Course Overview

This is an introductory graduate-level course in computer architecture. The course assumes a basic level of computer architecture knowledge (successful completion of an undergraduate course in computer architecture), continuing the study of computer architecture by examining the more advanced and intricate aspects of modern processor micro-architecture.

Through this course, students will gain an understanding of the key concepts of modern processor architecture and its implications on software and hardware design. Specifically, the course will concentrate on the memory hierarchy and out-of-order execution, giving students the necessary tools to understand the micro-architecture of modern processors and to reason about their performance.

The best way to understand why systems are built the way they are built is to build such systems. To that end, this is primarily a project-oriented course. The lectures will be dominated by a discussion of micro-architectural components, with the explicit goal of enabling students to create detailed working models of these components in C++ (SystemC).

Course Topics

Memory Hierarchy, Cache Internals, DRAM, Prefetching, Pipelining, Instruction-Level Parallelism, Instruction Fetch, Branch Prediction, Instruction Decode, Out-of-order Execution, Register Renaming, Instruction Scheduling, Vector Processing, GPUs, and Multi-[socket(SMP,DSM)|core(CMP)|thread(SMT,CMT)] machines.

Office Hours

CS 1419, Mondays, 2:30PM-4:00PM or by appointment

Evaluation

  • Quiz – 0
  • Homework – 10
  • Warm-up Project – 20
  • Course Project – 100
  • Final Exam – 30
  • Participation – 10

Only the Quiz and Course Project are required, the rest of the components are optional. Students will need to attain a total of 100 points to receive an A. Participation will be judged by the instructor based on active interaction during lecture and on the course mailing list.

Prerequisites

An undergraduate course in computer architecture is an informal prerequisite for this class, as is proficient knowledge of C++ programming and debugging. Students without prior computer architecture experience or working knowledge of C++ will be expected to devote additional time early during the course. Prior coursework in compilers, digital logic, and/or hardware design will likely be of help. If you are unsure whether or not you have the necessary background or if you are unable to sign up via the web, please contact the instructor.

Book

The book recommended for this course is Computer Architecture: A Quantitative Approach by Hennessy and Patterson. Any edition is fine, as the core concepts that are covered in this course have not changed since the early editions of the book. Students who have not recently taken an undergraduate Computer Architecture course are advised to review Appendices A, B, and C. In addition to the paper book, several Appendices are available on line at http://booksite.mkp.com/9780123838728/references.php. Students are strongly encouraged to pay particular attention to Appendix K when working on the course project.

Assignments

Homework #1
Write a program to automatically determine a CPU’s micro-architectural parameters (such as the sizes, organization, and latencies of the on-chip caches and core structures). Homework is due on the last day of class. Detailed instructions are here.
Warm-up Project (Cache Array)
Implement a cache array in SystemC for the MARSS full-system simulator. E-mail your list of group members to the instructor and TA by February 22nd. Project is due on March 5th. Detailed instructions are here.
Course Project (Core)
Implement a functional processor core for a subset of the x86 ISA in SystemC. E-mail your list of group members to the instructor and TA by March 20th. Detailed instructions will be posted shortly. Detailed instructions are here.
Useful references:

Lecture Slides

These lectures have been developed in parts by Professors Austin, Brehob, Falsafi, Ferdman, Hill, Hoe, Kim, Loh, Lipasti, Martin, Roth, Shen, Smith, Sohi, Tyson, Vijaykumar, and Wenisch of Carnegie Mellon University, Georgia Institute of Technology, Purdue University, Stony Brook University, University of Michigan, University of Pennsylvania, and University of Wisconsin.

Policies

The collaboration and academic integrity policy in this class is likely to be significantly different from other courses you’ve taken in the past. Absolutely all forms of collaboration are permitted, including collaboration with other students in and outside of class, as well as outside of the university. There are only three explicit requirements for all submitted work:

All submitted work must have an explicit Copyright label containing your name.
All submitted work must have an explicit license.
All Copyright laws of the United States must be respected.

For example, for all submitted materials, you must include a label similar to one of the following:

Copyright © 2013 by (Your Name). All rights reserved.
Copyright © 2013 by (Your Name). Permission to copy and distribute verbatim copies permitted.
Copyright © 2013 by (Your Name). This work is licensed under GPLv3, details in accompanying COPYING file.

Applying open-source licenses to your work (BSD, GPL, or others) is encouraged, but not required. Any willful violations of this policy will result in a failing grade being assigned for the course.

Course Mailing List

Subscription to the course mailing list is required.
Subscribe at http://lists.cs.stonybrook.edu/mailman/listinfo/cse502.