Computer Architecture is about planning, designing and, eventually, building computer systems. It is where hardware design meets software. A computer architect’s job is to choose, and sometimes create, hardware components and interconnect them in order to create computers that meet certain functional, performance and cost goals.
This course is an introductory study of the major concepts of modern processor architecture. Through this course, students will gain an understanding of the key concepts of modern processor architecture and its implications on software and hardware design. Specifically, the course will concentrate on the memory hierarchy and out-of-order execution, giving students the necessary tools to understand the micro-architecture of modern processors and to reason about their performance.
The best way to understand why systems are built the way they are is to build such systems. To that end, this is primarily a project-oriented course. The lectures will be dominated by a discussion of micro-architectural components, with the explicit goal of enabling students to create detailed working models of these components.
Memory Hierarchy, Cache Internals, DRAM, Prefetching, Pipelining, Instruction-Level Parallelism, Instruction Fetch, Branch Prediction, Instruction Decode, Out-of-order Execution, Register Renaming, Instruction Scheduling, Vector Processing, GPUs, and Multi-[socket(SMP,DSM)|core(CMP)|thread(SMT,CMT)] machines.
NCS 343, Tuesdays, 2:30PM-3:50PM or by appointment
- Homework – 10
- Warm-up Project 1 – 10
- Warm-up Project 2 – 10
- Course Project – 100
- Final Exam – 40
- Participation – 10
Only the Course Project (100 points) is required, the rest of the components are optional. Students who attain a total of 100 points or more are guaranteed an A. The rest of the grades are curved (many students get A grades with fewer than 100 points). Individual participation will be judged by the instructor based on active interaction during lecture and on the course mailing list (attendance in lecture or office hours does not constitute participation).
An undergraduate course in computer architecture or system organization is an informal prerequisite for this class, as is proficient knowledge of programming and debugging. Students without prior systems experience or working knowledge of programming will be expected to devote additional time early during the course. Prior coursework in operating systems, compilers, digital logic, and/or hardware design will likely be of help. If you are unsure whether or not you have the necessary background or if you are unable to sign up via the web, please contact the instructor.
The books recommended for this course are Modern Processor Design: Fundamentals of Superscalar Processors by Shen and Lipasti or Computer Architecture: A Quantitative Approach by Hennessy and Patterson. Any edition is fine, as the core concepts that are covered in this course have not changed since the early editions of these books. In addition to the paper books, several Appendices of H&P are available online.
- Homework #1
- Due March 26th
- Warm-up Project 1 (fetch and decode)
- Due February 21st
- Warm-up Project 2 (ALU)
- Due March 7th
- Course Project (Core)
- Implement a functional processor core for the RISC64IM ISA.
These lectures have been developed in parts by Professors Austin, Brehob, Emer, Falsafi, Ferdman, Hill, Hoe, Honarmand, Kim, Loh, Lipasti, Martin, Milder, Roth, Sanchez, Shen, Smith, Sohi, Torrellas, Tyson, Vijaykumar, and Wenisch of Carnegie Mellon University, Georgia Institute of Technology, Massachusetts Institute of Technology, Purdue University, Stony Brook University, University of Michigan, University of Illinois, University of Pennsylvania, and University of Wisconsin.
- (pdf) (ppsx) Introduction (lecture 1)
- (pdf) (ppsx) Review (lectures 2,3)
- (pdf) (ppsx) SystemVerilog (lecture 4++)
- (pdf) (ppsx) Core Pipelining (lectures 5,6)
- (pdf) (ppsx) Memory Hierarchy & Caches (lecture 7)
For the homework, warm-up projects, and course project, you may work in groups of any size. If you work alone, you submit your own work. If you work with partners, you submit your assignments jointly. Whether or not you work in a group, you may discuss the assignment details, designs, debugging techniques, or anything else with anyone you like in general terms, but you may not provide, receive, or take code to or from anyone outside of your group. The code that you submit must be your own work and only your own work. Any evidence that source code has been copied, shared, or transmitted in any way between non-partners will be regarded as evidence of academic dishonesty.
You must declare your group via email to the instructor and TA at most 5 days after the assignment handout. You may change group composition for each assignment, as long as each change is announced within 5 days of that assignment’s handout.
Larger group sizes allow you to take on more challenging projects. To balance out the advantages of a larger group compared to individuals working alone, grading strictness depends on the size of the group. In the past, large groups have succeeded in submitting amazing projects. However, beware of accepting deadbeats into your group: they are likely to hurt your grade beyond repair.
Some more-specific guidelines for the assignments:
- You may not look at code from previous years of this course.
- You may not look at code from similar courses at other universities.
Assignment Hand-in Policy
All deadlines are before the start of lecture on the due date. Submissions will be accepted on or after the due date. Assignments submitted after the due date will be assessed a 1-point per day penalty (multiplied by the number of group members) for each late day, in 24-hour increments.
Course Mailing List
We will be using Piazza for class discussion. The system is highly catered to getting you help fast and efficiently from classmates and the instructors. Rather than emailing questions to the teaching staff, you should post your questions on Piazza. If you have any problems or feedback for the developers, email firstname.lastname@example.org.
Find our class page at: https://piazza.com/stonybrook/spring2019/cse502/home
Disability Support Services
If you have a physical, psychological, medical or learning disability that may impact your course work, please contact Disability Support Services, ECC (Educational Communications Center) Building, room 128, (631) 632-6748. They will determine with you what accommodations, if any, are necessary and appropriate. All information and documentation is confidential. http://studentaffairs.stonybrook.edu/dss/
Each student must pursue his or her academic goals honestly and be personally accountable for all submitted work. Representing another person’s work as your own is always wrong. Faculty are required to report any suspected instances of academic dishonesty to the Academic Judiciary. For more comprehensive information on academic integrity, including categories of academic dishonesty, please refer to the academic judiciary website at http://www.stonybrook.edu/uaa/academicjudiciary/
Critical Incident Management
Stony Brook University expects students to respect the rights, privileges, and property of other people. Faculty are required to report to the Office of Judicial Affairs any disruptive behavior that interrupts their ability to teach, compromises the safety of the learning environment, or inhibits students’ ability to learn.