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20.1   Introduction

Simics models a PCI bus using several objects of various kinds:

• A pci-bus object that models the bus to which PCI devices are connected, keeping track of which device is in which slot.
• Three memory-space objects that model the three different access types to the PCI bus: one for configuration accesses, one for I/O accesses and one for memory accesses.
• An object acting as a bridge, linking the PCI bus to the rest of the system. This can be a host-to-PCI bridge (like a Northbridge chipset) or a PCI-to-PCI bridge (linking the PCI bus to a parent PCI bus).
• A number of PCI devices connected to the PCI bus object. Note that in Simics, each function of a multi-function PCI device must be represented by a separate object.

Let us look at a more concrete example from the simulated Ebony board:

OBJECT pcibus0 TYPE pci-bus {
        conf_space: pciconf0
        memory_space: pcimem0
        io_space: pciio0
        bridge: pci0
        interrupt: (pci0)
        pci_devices: ((0, 0, pci0, 1), (3, 0, dec0, 1))
}
OBJECT pciconf0 TYPE memory-space {
}
OBJECT pciio0 TYPE memory-space {
}
OBJECT pcimem0 TYPE memory-space {
}
OBJECT pci0 TYPE ppc440gp-pci {
        pci_bus: pcibus0
        ...
}
OBJECT dec0 TYPE DEC21140A-dml {
        pci_bus: pcibus0
        ...
}

• The pcibus0 object represents the PCI bus. The pci-devices attribute shows that two PCI devices are connected: pci0 is the bridge (presented below), inserted as function 0 in slot 0; dec0 is a DEC21140A network card inserted as function 0 in slot 3.
• The three memory-spaces are pciconf0 for configuration, pciio0 for I/O and pcimem0 for memory. Note that these memory-spaces are empty. The configuration memory-space will be filled in automatically as devices are connected to the PCI slots. The other two spaces will be filled in when software enables different base address registers in the PCI devices. In most cases, these spaces need never be manipulated manually.
• The pci0 object is a host-to-PCI bridge present in the 440GP chipset. It creates a bridge between the PPC 440GP processor and the PCI devices.
• The dec0 PCI device is connected to the PCI bus in slot 3, function 0.

Once the configuration presented above is loaded into Simics, a number of parameters will be configured automatically. Let us look at the result of this automatic configuration. The PCI bus object now reports the devices that are connected:

simics> pcibus0.info
Information about pcibus0 [class pci-bus]
=========================================

                 Bridge device : pci0
             Interrupt devices : pci0
                PCI Bus Number : 0x0

                  Config space : pciconf0
                      IO space : pciio0
                  Memory space : pcimem0

Connected devices:
             Slot 0 function 0 : pci0
             Slot 3 function 0 : dec0

The configuration memory-space has been automatically configured to include the configuration registers defined by the devices connected on the bus. The exact addresses where the configuration registers are mapped are determined using the PCI configuration address described in the next section.

simics> pciconf0.map
base               object               fn offs               length
0x0000000000000000 pci0                 255 0x0                0x100
0x0000000000001800 dec0                 255 0x0                0x100

The PCI I/O and memory spaces are empty since no base address registers have been configured yet. The bridge, however, catches all unmapped accesses in the PCI memory space to redirect them towards the main memory. This enables PCI devices to perform DMA accesses to and from other PCI devices or main memory.

simics> pciio0.map
base               object               fn offs               length
simics> pcimem0.map
base               object               fn offs               length
- default -        pci0                  5 0x0                -
            target -> plb

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