A Full-System VM-HDL Co-Simulation Framework for Servers with PCIe-Connected FPGAs

Cho, Shenghsun; Patel, Mrunal; Chen, Han; Ferdman, Michael; Milder, Peter

by Shenghsun Cho, Mrunal Patel, Han Chen, Michael Ferdman, Peter Milder

Reference:

A Full-System VM-HDL Co-Simulation Framework for Servers with PCIe-Connected FPGAs Shenghsun Cho, Mrunal Patel, Han Chen, Michael Ferdman, Peter Milder, In 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA), 2018.

Bibtex Entry:

@inproceedings{ferdman-a-full-system-vm-hdl-co-simulation-framework-for-servers-with-pcie-connected-fpgas,
  author = {Shenghsun Cho and Mrunal Patel and Han Chen and Michael Ferdman and Peter Milder},
  title = {A {F}ull-{S}ystem {VM}-{HDL} {C}o-{S}imulation {F}ramework for {S}ervers with {PCI}e-{C}onnected {FPGA}s},
  booktitle = {2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays ({FPGA})},
  pdf = {http://compas.cs.stonybrook.edu/%7Emferdman/downloads.php/FPGA18_Full-System_VM-HDL_Co-Sim_Framework_for_Servers_with_PCIe-Connected_FPGAs.pdf},
  year = {2018}
}