Leveraging FPGA Layout to Minimize Jitter in Statistical Time-to-Digital Converters

Samandi, Farid; Ji, Tianchu; Cho, Shenghsun; Ferdman, Michael; Milder, Peter

by Farid Samandi, Tianchu Ji, Shenghsun Cho, Michael Ferdman, Peter Milder

Reference:

Leveraging FPGA Layout to Minimize Jitter in Statistical Time-to-Digital Converters Farid Samandi, Tianchu Ji, Shenghsun Cho, Michael Ferdman, Peter Milder, In 29th IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2021.

Bibtex Entry:

@inproceedings{ferdman-fccm-tdc,
  author = {Farid Samandi and Tianchu Ji and Shenghsun Cho and Michael Ferdman and Peter Milder},
  title = {Leveraging FPGA Layout to Minimize Jitter in Statistical Time-to-Digital Converters},
  booktitle = {29th IEEE International Symposium on Field-Programmable Custom Computing Machines ({FCCM})},
  pdf = {},
  year = {2021}
}