Runtime-Programmable Pipelines for Model Checkers on FPGAs

Patel, Mrunal; Cho, Shenghsun; Ferdman, Michael; Milder, Peter

by Mrunal Patel, Shenghsun Cho, Michael Ferdman, Peter Milder

Reference:

Runtime-Programmable Pipelines for Model Checkers on FPGAs Mrunal Patel, Shenghsun Cho, Michael Ferdman, Peter Milder, In 29th International Conference on Field Programmable Logic and Applications (FPL), 2019. (nominated for the Best Paper award)

Bibtex Entry:

@INPROCEEDINGS{ferdman-fpl-runtime-programmable-pipelines-for-model-checkers-on-fpgas,
    author       = "Mrunal Patel and Shenghsun Cho and Michael Ferdman and Peter Milder",
    title        = "Runtime-Programmable Pipelines for Model Checkers on FPGAs",
    pdf          = {http://compas.cs.stonybrook.edu/%7Emferdman/downloads.php/FPL19_Runtime-Programmable_Pipelines_for_Model_Checkers_on_FPGAs.pdf},
    booktitle    = "29th International Conference on Field Programmable Logic and Applications (FPL)",
    year         = "2019",
    note         = "nominated for the Best Paper award",
    organization = "IEEE"
}