Spring 2015 :: CSE 502 - Computer Architecture

  • 05/02: The submission deadline for the course project is May 20th (the last day of the semester) at 11:59pm.
  • 04/20: The final exam will be held on 5/15, 11:15am-1:45pm in Frey Hall 205. It will be a closed-everything exam and will cover all the lectures, class discussions, piazza posts, homework, project and reading assignments.
  • 03/07: The midterm exam will be held on 03/31 in class. The exam will include all the lectures, class discussions, homework(s) and piazza posts up to the exam date.
  • 03/01: The skeleton code for HW1 is released. Please see the Assignments page for more details.
  • 02/25: The skeleton code for the course project is now available. Please see the Assignments page for more details.
  • 01/20: Welcome to CSE 502, Graduate Computer Architecture. Please make sure to sign up for the course newsgroup.

Course Description

Computer Architecture is about planning, designing and, eventually, building computer systems. It is where hardware design meets software. A computer architect's job is to choose, and sometimes create, hardware components and interconnect them in order to create computers that meet certain functional, performance and cost goals.

This course is an introductory study of the major concepts of modern processor architecture. Through this course, students will gain an understanding of the key concepts of modern processor architecture and its implications on software and hardware design. Specifically, the course will concentrate on the memory hierarchy and out-of-order execution, giving students the necessary tools to understand the micro-architecture of modern processors and to reason about their performance.

The best way to understand why systems are built the way they are is to build such systems. To that end, this is primarily a project-oriented course. The lectures will be dominated by a discussion of micro-architectural components, with the explicit goal of enabling students to create detailed working models of these components.

Course Topics

Fundamentals of Processor Performance and Power Consumption, Instruction Set Architectures, Pipelining, Instruction Fetch, Branch Prediction, Instruction Decode, Instruction-Level Parallelism, Out-of-order Execution, Register Renaming, Instruction Scheduling, Memory Hierarchy, Cache Internals, DRAM, Prefetching, Vector Processing, GPUs, and Multi-[socket(SMP,DSM)|core(CMP)|thread(SMT,CMT)] machines.


An undergraduate course in computer architecture or system organization is an informal prerequisite for this class, as is proficient knowledge of programming and debugging. Students without prior systems experience or working knowledge of programming will be expected to devote additional time early during the course. Prior coursework in operating systems, compilers, digital logic, and/or hardware design will likely be of help. If you are unsure whether or not you have the necessary background or if you are unable to sign up via the web, please contact the instructor.

Course Information

  • Time: Tu & Th 10:00am - 11:20am.
  • Location: Frey Hall 205.
  • Instructor: Nima Honarmand, Computer Science 1409. Office Hours: Tu & Th 11:30am - 01:00pm.
  • Teaching Assistant: Varun Agrawal, Computer Science 2217. Office Hours: M & W 1:30pm - 3:00pm.
  • Newsgroup: on Piazza. This is the main venue for all class-related discussions.



There will be 1-2 homework assignments and a course project. You can find more details about them here.


Students will be evaluated based on their performance in the following categories:

  • Quiz: 0
  • Homework: 10
  • Course project: up to 110
  • Midterm exam: 15
  • Final exam: 25
  • Participation: 10

The quiz contributes 0 points to your course grade but is mandatory. Students who attain a total of 100 points or more are guaranteed an A. Students who attain a total of 95 points or more are guaranteed an A-. The rest of the grades are curved (many students get A grades with fewer than 100 points). Individual participation will be judged by the instructor based on active interaction during lecture and on the course mailing list (attendance in lecture or office hours does not constitute participation).


The following books are the recommended for this course. You can find them on Amazon or other online bookstores. I highly recommend that you obtain at least one (ideally both) of the first two and study it cover to cover, especially if you are planning to pursue Systems research for your PhD thesis.

  • Modern Processor Design: Fundamentals of Superscalar Processors, by Shen and Lipasti,
  • Computer Architecture: A Quantitative Approach, by Hennessy and Patterson, 5th Ed, and
  • Computer Organization and Embedded Systems, by Hamacher, Vranesic, Zaky, and Manjikian, 6th Ed.
In addition to the paper books, several Appendices of H&P are also available online.

Academic Integrity

Each student must pursue his or her academic goals honestly and be personally accountable for all submitted work. Representing another person’s work as your own is always wrong. Faculty is required to report any suspected instances of academic dishonesty to the Academic Judiciary. For more comprehensive information on academic integrity, including categories of academic dishonesty please refer to the academic judiciary website here.

Critical Incident Management

Stony Brook University expects students to respect the rights, privileges, and property of other people. Faculty are required to report to the Office of University Community Standards any disruptive behavior that interrupts their ability to teach, compromises the safety of the learning environment, or inhibits students’ ability to learn. Faculty in the HSC Schools and the School of Medicine are required to follow their school-specific procedures. Further information about most academic matters can be found in the Undergraduate Bulletin, the Undergraduate Class Schedule, and the Faculty-Employee Handbook.


The course lectures are largely based on material from offerings of similar courses by Professors Austin, Brehob, Falsafi, Ferdman, Hill, Hoe, Kim, Loh, Lipasti, Martin, Milder, Roth, Shen, Smith, Sohi, Torrellas, Tyson, Vijaykumar, and Wenisch of Carnegie Mellon University, Georgia Institute of Technology, Purdue University, Stony Brook University, University of Illinois, University of Michigan, University of Pennsylvania, and University of Wisconsin.