Virtually tagged caches are usually informed of the state of the MMU in order to immediately invalidate lines whose virtual-to-physical mapping changes. g-cache is not MMU-aware, so when looking for a hit with virtual tags, it tries to match both the virtual tag and the physical tag. This approach prevents cache accesses from triggering a hit on lines with invalid translations, but it makes it possible for some invalid mappings to be present in the cache (and shown by the status command for example).
Some special instructions (atomic instructions in particular) can cause the STC counters to be off by about one memory access per million, which influences the total number of transactions reported by the cache. The UltraSPARC architecture should be free of this bug, while others may still trigger it in some circumstances. The workaround is to avoid using the STC if a very precise total transaction count is needed.
g-cache doesn't understand control transactions like cache flushes and cache line locking.