Fall 2015 :: CSE 610 - Parallel Computer Architectures

  • 08/26: Welcome to CSE 610, Parallel Computer Architectures. Please make sure to sign up for the course newsgroup.

Course Description

Computer Architecture is about planning, designing and, eventually, building computer systems. It is where hardware design meets software. A computer architect's job is to choose, and sometimes create, hardware components and interconnect them in order to create computers that meet certain functional, performance and cost goals.

Parallel Computer Architecture is a branch of Computer Architecture that focuses on “parallel computing” where multiple computing entities act as a whole to collaboratively solve a computational problem.

This course is an introductory study of the major concepts of parallel computer architecture. Through this course, students will gain an in-depth understanding of the key concepts of parallel hardware and software design. We will cover classic parallel architecture topics—such as programming models and communication issues in message passing and shared-memory architectures—as well as a variety of recent and/or more exotic ones—like datacenters and heterogeneous architectures. The overarching goal is to provide the students with a balanced understanding of the wide spectrum of today's parallel computing platforms as well as the fundamental computation and communication principles that underlie their design and operation.

This is an advanced graduate-level course. Therefore, there will be a major emphasis on doing research in this area. There will be a semester-long course project with two objectives: 1) introduce the students to research in the fields computer architecture and systems, and 2) advancing the state of the art in parallel computer design. You can find more information about the course projects on the assignments page.

Course Topics

Including, but not limited to:

  • Fundamentals of parallel performance and scalability
  • Communication issues in parallel computing
  • Role of power in modern parallel computing
  • Shared-memory and message-passing programming models
  • Cache coherence
  • Basic and advanced synchronization mechanisms (in hardware and software)
  • Memory consistency models
  • Multithreaded and Multicore processor architectures
  • Interconnection networks
  • High-level parallel programming models
  • Data-parallel computing and GPGPUs
  • Data-flow architectures
  • Systolic architectures
  • Vector processing
  • Heterogeneous architectures
  • Application-specific accelerators
  • Basics of warehouse-scale- and super-computers


A graduate course on computer architecture (in particular, superscalar processor design and memory hierarchies) is an informal prerequisite for this class, as is proficient knowledge of programming and debugging. Prior coursework in operating systems, compilers, digital logic, and/or hardware design will likely be of help. If you are unsure whether or not you have the necessary background or if you are unable to sign up via the web, please contact the instructor.

Course Information

  • Time: Tu & Th 11:30am - 12:50pm.
  • Location: Harriman Hall 116.
  • Instructor: Nima Honarmand, New Computer Science 339. Office Hours: Tu & Th 1:00-2:00pm.
  • Newsgroup: on Piazza. This is the main venue for all class-related discussions.



There are no exams for this course.


There will be homework assignment(s), paper reading and analysis, seminar and the course project. You can find more details about them here.


See the introduction slides here for the details.


There are no required references for the course beyond the assigned paper. However, there a large number of recommended ones that are listed here. If you are doing, or will be doing, computer architecture research, you will find many of these to be invaluable. Therefore, it is recommended that you at least skim through them.

Academic Integrity

Each student must pursue his or her academic goals honestly and be personally accountable for all submitted work. Representing another person’s work as your own is always wrong. Faculty is required to report any suspected instances of academic dishonesty to the Academic Judiciary. For more comprehensive information on academic integrity, including categories of academic dishonesty please refer to the academic judiciary website here.

Critical Incident Management

Stony Brook University expects students to respect the rights, privileges, and property of other people. Faculty are required to report to the Office of University Community Standards any disruptive behavior that interrupts their ability to teach, compromises the safety of the learning environment, or inhibits students’ ability to learn. Further information about most academic matters can be found in the Undergraduate Bulletin, the Undergraduate Class Schedule, and the Faculty-Employee Handbook.


The course lectures are partly based on material from offerings of similar courses by Professors Joel Emer, Daniel Sanchez, Josep Torrellas and Thomas Wenisch of Massachusetts Institute of Technology, University of Illinois and University of Michigan.